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Computer Systems Design · End Term · May 2026 · FN

Computer Systems Design · End Term · May 2026 FN

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Questions and published explanations below are available without starting a test. Some questions may not have a published solution yet.

0 / 20 published solutions

Question 2 MCQ · 1.0 marks

In a 4-bit system, the one’s complement of the binary number 1000 is 1011.
6406537461655.
True
6406537461656.
False

A published solution is not available for this question yet.

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Question 3 MCQ · 1.0 marks

A synchronous counter triggers all flipflops using a common clock signal, while an asynchronous counter triggers each flipflop using the output of the previous flipflop.
6406537461657.
True
6406537461658.
False

A published solution is not available for this question yet.

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Question 4 MCQ · 1.0 marks

In a system with 65 unique states, 6 flipflops are sufficient to represent all the states.
6406537461659.
True
6406537461660.
False

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Question 5 MCQ · 1.0 marks

In a decoder, at any point, exactly one of the outputs is 1 and all the rest are 0s.
6406537461661.
True
6406537461662.
False

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Question 6 MCQ · 1.0 marks

According to Moore’s law, if a computer system has 2 million transistors today, then it will have approximately 32 million transistors in 4 years.
6406537461663.
True
6406537461664.
False

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Question 7 MCQ · 3.0 marks

The given truth table has to be realized with D flipflop as shown below.
Source diagram or notation
Source diagram or notation
What is the equation for **Logic** in terms of A, B,
Source diagram or notation
?
6406537461665.Source diagram or notation
6406537461666.Source diagram or notation
6406537461667.Source diagram or notation
6406537461668.Source diagram or notation
6406537461669.
None of these

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Question 8 NAT · 3.0 marks

What is the minimum number of 2 input NOR gates required to design a circuit that implements the function
Source diagram or notation
.

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Question 9 NAT · 3.0 marks

A 4-to-2 priority encoder has gates inputs
Source diagram or notation
and
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where
Source diagram or notation
has the highest priority and
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has the lowest priority. The output logic equations are given by
Source diagram or notation
and
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What is the output
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when the input vector
Source diagram or notation
? Note: Enter the answer as a two-bit binary value. For example, if the answer is (0, 0), enter it as 00.

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Question 10 NAT · 3.0 marks

A 1-bit comparator takes two input bits, A and B, and outputs **1** if A = B and **0** otherwise. Using only 2-input **NOR** gates, what is the minimum number of gates required to design such a comparator circuit?

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Question 11 NAT · 3.0 marks

We want to implement A ⊙ B (A XNOR B) using 2:1 multiplexers. What is the minimum number of 2:1 multiplexers required?

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Question 12 NAT · 3.0 marks

A circuit has four inputs: A, B, C, D and one output F. The output F is logic 1 if and only if exactly two of the four inputs are 0. In all other cases, the output is 0. What is the minimum number of minterms in the Sum of Products (SOP) expression for F?

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Question 13 NAT · 3.0 marks

Consider the circuit consisting of two D flipflops and one XNOR gate as shown below. The initial states are
Source diagram or notation
= 0,
Source diagram or notation
= 0, What is the number of possible states for the circuit?
Source diagram or notation

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Question 14 NAT · 3.0 marks

Consider a mod-14 up counter with an initial state of 0011. What will be the state of the counter after 25 clock pulses?

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Question 15 NAT · 3.0 marks

Consider the circuit diagram using J-K flipflop as shown below. Assuming it was initially cleared to 0, state the output Y for the next 5 clock pulses.
Source diagram or notation
Note: Do not write initial state as part of the answer. Your answer should be in the form:
Source diagram or notation

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Question 16 NAT · 3.0 marks

Consider a 10-bit Johnson counter. What is the total number of unique states it can cycle through?

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Question 17 SHORT_TEXT · 3.0 marks

Consider a common bus architecture comprising of memory, and registers X, Y, Z. The control word format is given below.
Source diagram or notation
What would be the control word if you intend to perform a register transfer from register X to register Z? Note: Enter the value in hexadecimal format (e.g. 0x24).

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Question 18 NAT · 3.0 marks

A processor contains 256 registers in its register file. The ALU of the processor supports 8 operations: addition, subtraction, multiplication, division, AND, OR, XOR, and NOR. What is the minimum number of bits required by an instruction to perform a subtraction operation between two operands stored in the register file, and store the result in a third register?

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Question 19 NAT · 3.0 marks

Consider the control word given below.
Source diagram or notation
What is the maximum number of registers that can be stored in the instruction file?

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Question 20 SHORT_TEXT · 3.0 marks

Suppose we want to execute a data movement instruction, where we move the data present in register
Source diagram or notation
to register
Source diagram or notation
. **Instruction:**
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Source diagram or notation
Source diagram or notation
Destination register,
Source diagram or notation
Source register Operands: 0
Source diagram or notation
d
Source diagram or notation
31, 0
Source diagram or notation
r
Source diagram or notation
31 **Instruction Format:**
Source diagram or notation
What will be the hexadecimal machine code for the instruction? Note: Enter the value in hexadecimal format (e.g., 0x2438).

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Question 21 NAT · 3.0 marks

Perform 2’s complement subtraction of two numbers A = 22 and B = 47. What is the result of A − B in 8-bit binary format? (Note: Don’t use sign-magnitude form.)

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Report a correction for Q21